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Yigal Bejerano

Visiting Research Scientis,
Department of Electrical Engineering,
Columbia University
New York City, NY, USA.

Email: yigalbejerano@gmail.com

Throughout my career, I have combined applied and fundamental research in the fields of networking and algorithms. I have had the privilege to work with many excellent researchers at Bell-Labs on various design, management and optimization challenges in the context of wireless and wireline networks

In the last few years I have been working on challenges related to design and management of very large wireless systems. Motivated by the increasing demand for live video streams in crowded areas, such as sports stadiums, theme parks and crowded public events, I established in 2013 a collaboration between Bell-Labs and Columbia University and together we developed the Adaptive Multicast Services (AMuSe) system for large scale video distribution over WiFi-networks. We implemented the system on the ORBIT testbed at WinLab, Rutgers University and demonstrated its practicality. Later we used our experience from the AMuSe project to develop a Dynamic Management and Optimization (DyMo) system for LTE-eMBMS systems. A paper on this study will be published at the Infocom 2017 conference. Currently we are leveraging our expertise to design an unified management platform for large-scale wireless networks (such as Internet-of-Things systems and Vehicular networks) based on near reliable multicast services.

I earned my Ph.D. at the Electrical Engineering Dept. in Technion, Israel, under the supervision of Prof. Israel Cidon and Prof. Joseph (Seffi) Naor. My Ph.D. thesis considers various aspects of mobility and connectivity management for mobile users in Personal Communication Systems and the Internet.

My experience includes three years as a senior software engineer at Intelligent Information System Ltd. (I.I.S), where I contributed to the development of communication products. I also worked two years as software engineer at the Computer Aid Design (CAD) group of Intel-Israel R&D center, where I participated in the development and implementation of algorithms for logical synthesis of VLSI chips.